Figure 1: Rate-Controlled Static-Priority Queueing.
Admission control and resource allocation are tightly related to the packet scheduling algorithms in the switches and routers. In order to simplify the following discussion, we will assume that the nodes in the network use rate-controlled static-priority (RCSP) [18] schedulers. We chose this algorithm because it makes the local admission decision particulary simple to describe. Our scheme works for other scheduling algorithms as well, such as EDF, or various forms for regulated EDF (jitter EDD or delay EDD), or combinations thereof.
A RCSP server consists of two components, a rate controller and static priority scheduler as illustrated in Figure 1. The rate controller acts as traffic regulator, and shapes the input traffic from each connection into the desired traffic pattern by assigning an eligibility time to each packet. It consists of a set of regulators, one for each of the connections traversing the switch. The regulators control the interactions between switches and control jitter. There are two types of regulators: rate-jitter controlling regulators, which control the rate jitter and partially reconstructing the traffic pattern, and delay-jitter controlling regulators, which control delay jitter and fully reconstruct the traffic pattern.
The static priority scheduler consists of a number of prioritized real-time packet queues. Each connection is assigned to a particular priority level and, thus, to a particular queue, at establishment time. Since schedulers are assigned to control the transmission for particular links, a branch node may have several schedulers over for each outgoing link. Different priorities can therefore be assigned to the same connection at outgoing links of a branch node. During system configuration time, a priori local delay bounds are assigned to each priority level. The higher the priority level assigned to a connection, the lower the local delay bound. By limiting the number of connections at each priority level using the admission control conditions in Equation (1) [18], the waiting time of each packet at a priority level is guaranteed to be less than the delay bound associated with that level:
where 
is the local delay bound previously assigned to
priority level m of the scheduler. The left side of the inequality
defines the maximum amount of time a packet can be delayed by other
packets at the same or higher priorities. 
and 
denote the minimum interarrival time and maximum packet
size, respectively, of the jth connection among 
connections
traversing the switch at priority level k at a particular scheduler.
The link speed is l, and the size of the largest packet that can be
transmitted over the link is 
. If Inequality (1)
is satisfied, the waiting time of an eligible packet at level m is
bounded by . It follows that Inequality (1) can be
used as the admission control condition for each switch.
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